[Mono-dev] [PATCH] Enable TLS for PPC32/64

[Steven Munroe]

On Wed, 2009-01-28 at 16:46 +0100, Paolo Molaro wrote:
> On 01/25/09 Steven Munroe wrote:
> snip
> 
> > @@ -664,21 +890,29 @@
> >  		isync
> >  	}
> >  #else
> > -	if (1) {
> > -		for (p = start; p < endp; p += cachelineinc) {
> > -			asm ("dcbf 0,%0;" : : "r"(p) : "memory");
> > +	/* For POWER5/6 with ICACHE_SNOOP the dcbst/icbi is not required.  */
> > +	if (!HAS_ICACHE_SNOOP) {
> > +		if (linux_ppc_SMP) {
> > +			for (p = start; p < endp; p += cachelineinc) {
> > +				asm ("dcbf 0,%0;" : : "r"(p) : "memory");
> > +			}
> > +		} else {
> > +			for (p = start; p < endp; p += cachelineinc) {
> > +				asm ("dcbst 0,%0;" : : "r"(p) : "memory");
> > +			}
> 
> The changes to icache flush should be a separate patch. As I said already
> on irc, though, unless there is a bug in the code, changes to it should
> be done only if there are hard numbers showing that the change is a
> performance benefit in some real-world case. The code as it is written
> fixed some random crashes happening a few years ago, so there must be
> very strong reasons to change it even a single instruction.
> 
if there WAS a problem will some chip in the past we address that
separately. But this changes are important to the server class machines
and I have carefully crafted this patch to only optimize for the case
where we know (from the auxv) what the hardware actually is.

Don't penalize the latest hardware for the sins of the a chip that no
one makes any more...