[Mono-dev] [PATCH] Regalloc tuning

[Massimiliano Mantione]

Working on treeprop, I noticed that sometimes the SciMark2 score
got worse, but only on amd64.

Looking at the generated code, I found that the problem was that
a variable heavily used in deep nesting BBs (level 3) was left on
the stack, while variables used at level 1 were put in registers.

So I decided to tune is a bit.
With the attached patch, I get about a 25% speedup on amd64, but
also a 2 or 3% decrease on x86...
Using a less aggressive approach (put "(1 * (bb->nesting))" in the
increment expression), the amd64 speedup is only 10 or 15%, but
at least x86 does not get worse.

I'll go on looking at the generated code on both CPUs to find a
better tradeoff, but in the meanwhile if somebody wants to have a
look at what happens with other architectures...

A (very rough) script to automate the process is here:
http://primates.ximian.com/~massi/BENCHMARKS/benchmark.pl
and some explanation for it is here:
http://primates.ximian.com/~massi/blog/archive/2006/Mar-13.html

Ciao,
  Massi

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