[Mono-list] Beginnings of an Alpha trampoline.
Laramie Leavitt
lar@leavitt.us
Mon, 27 Jan 2003 00:01:40 -0800 (PST)
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Paolo Molaro said:
> On 01/25/03 Laramie Leavitt wrote:
>> I have begun the infrastructure for an Alpha trampoline for mono. The
>> only thing that I have at the moment is the beginnings of
>> alpha-codegen.h
>>
>> Nothing is quite ready yet, but you can plop the following into
>> the arch/alpha directory and hack on it as you feel the need.
>
> Thanks! What license do you want to distribute this code with?
> Code that goes into the mono runtime needs to be licensed either under
> the X11 license (or similar) or under the LGPL, but in the latter case
> you'd also need to do a copyright assignment to Ximian (the copyright
> assignment is done in a way that permission is granted back to you to
> do anything you want with your own code). Let me know if you have any
> questions or if you need more info.
>
I will license the code as X11, as my main goal is to get mono to
run on the Alpha...
A small test program is attached as well.
alpha-codegen.h attached.
test.c attached.
Laramie.
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#ifndef __ALPHA_CODEGEN_H__
#define __ALPHA_CODEGEN_H__
/*
http://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf
*/
typedef enum {
alpha_r0 = 0,
alpha_r1 = 1,
alpha_r2 = 2,
alpha_r3 = 3,
alpha_r4 = 4,
alpha_r5 = 5,
alpha_r6 = 6,
alpha_r7 = 7,
alpha_r8 = 8,
alpha_r9 = 9,
alpha_r10 = 10,
alpha_r11 = 11,
alpha_r12 = 12,
alpha_r13 = 13,
alpha_r14 = 14,
alpha_r15 = 15,
alpha_r16 = 16,
alpha_r17 = 17,
alpha_r18 = 18,
alpha_r19 = 19,
alpha_r20 = 20,
alpha_r21 = 21,
alpha_r22 = 22,
alpha_r23 = 23,
alpha_r24 = 24,
alpha_r25 = 25,
alpha_r26 = 26,
alpha_r27 = 27,
alpha_r28 = 28,
alpha_r29 = 29,
alpha_r30 = 30,
alpha_r31 = 31, alpha_zero = 31,
/* aliases */
alpha_v0 = 0, /* return value */
alpha_t0 = 1, /* temporaries */
alpha_t1 = 2,
alpha_t2 = 3,
alpha_t3 = 4,
alpha_t4 = 5,
alpha_t5 = 6,
alpha_t6 = 7,
alpha_t7 = 8,
alpha_s0 = 9, /* saved registers */
alpha_s1 = 10,
alpha_s2 = 11,
alpha_s3 = 12,
alpha_s4 = 13,
alpha_s5 = 14,
alpha_s6 = 15,
alpha_a0 = 16, /* argument registers */
alpha_a1 = 17,
alpha_a2 = 18,
alpha_a3 = 19,
alpha_a4 = 20,
alpha_a5 = 21,
alpha_t8 = 22,
alpha_t9 = 23,
alpha_t10 = 24,
alpha_t11 = 25,
alpha_ra = 26, /* Return Address */
alpha_t12 = 27,
alpha_altreg = 28,
alpha_gp = 29, /* Global Pointer */
alpha_sp = 30, /* Stack Pointer */
} AlphaRegister;
typedef enum {
/* floating point registers */
alpha_f0 = 0,
alpha_f1 = 1,
alpha_f2 = 2,
alpha_f3 = 3,
alpha_f4 = 4,
alpha_f5 = 5,
alpha_f6 = 6,
alpha_f7 = 7,
alpha_f8 = 8,
alpha_f9 = 9,
alpha_f10 = 10,
alpha_f11 = 11,
alpha_f12 = 12,
alpha_f13 = 13,
alpha_f14 = 14,
alpha_f15 = 15,
alpha_f16 = 16,
alpha_f17 = 17,
alpha_f18 = 18,
alpha_f19 = 19,
alpha_f20 = 20,
alpha_f21 = 21,
alpha_f22 = 22,
alpha_f23 = 23,
alpha_f24 = 24,
alpha_f25 = 25,
alpha_f26 = 26,
alpha_f27 = 27,
alpha_f28 = 28,
alpha_f29 = 29,
alpha_f30 = 30,
alpha_f31 = 31, alpha_fzero = 31,
/* aliases */
alpha_fv0 = 0, /* return value */
alpha_fv1 = 1,
alpha_fs0 = 2, /* saved registers */
alpha_fs1 = 3,
alpha_fs2 = 4,
alpha_fs3 = 5,
alpha_fs4 = 6,
alpha_fs5 = 7,
alpha_fs6 = 8,
alpha_fs7 = 9,
alpha_ft0 = 10, /* temporary */
alpha_ft1 = 11,
alpha_ft2 = 12,
alpha_ft3 = 13,
alpha_ft4 = 14,
alpha_ft5 = 15,
alpha_fa0 = 16, /* args */
alpha_fa1 = 17,
alpha_fa2 = 18,
alpha_fa3 = 19,
alpha_fa4 = 20,
alpha_fa5 = 21,
alpha_ft6 = 22,
alpha_ft7 = 23,
alpha_ft8 = 24,
alpha_ft9 = 25,
alpha_ft10 = 26,
alpha_ft11 = 27,
alpha_ft12 = 28,
alpha_ft13 = 29,
alpha_ft14 = 30
} AlphaFPRegister;
/***************************************/
#define __alpha_int_32 unsigned int
/***************************************/
#define AXP_OFF26_MASK 0x03ffffff
#define AXP_OFF21_MASK 0x01fffff
#define AXP_OFF16_MASK 0x0ffff
#define AXP_OFF14_MASK 0x03fff
#define AXP_OFF13_MASK 0x01fff
#define AXP_OFF11_MASK 0x07ff
#define AXP_OFF8_MASK 0x0ff
#define AXP_OFF7_MASK 0x07f
#define AXP_OFF6_MASK 0x03f
#define AXP_OFF5_MASK 0x01f
#define AXP_OFF4_MASK 0x0f
#define AXP_OFF2_MASK 0x03
#define AXP_OFF1_MASK 0x01
#define AXP_REG_MASK AXP_OFF5_MASK
#define AXP_REGSIZE 5
#define AXP_OP_SHIFT 26
#define AXP_REG1_SHIFT 21
#define AXP_REG2_SHIFT 16
#define AXP_MEM_BR_SHIFT 14
#define AXP_LIT_SHIFT 13
#define alpha_opcode( op ) \
((op&AXP_OFF6_MASK) << AXP_OP_SHIFT)
#define alpha_reg1( reg ) \
((reg & AXP_REG_MASK) << AXP_REG1_SHIFT)
#define alpha_reg2( reg ) \
((reg & AXP_REG_MASK) << AXP_REG2_SHIFT)
#define alpha_reg3( reg ) \
(reg & AXP_REG_MASK)
#define alpha_fp_func( func ) \
((func & AXP_OFF11_MASK) << AXP_REGSIZE)
#define alpha_op_func( func ) \
((func & AXP_OFF7_MASK) << AXP_REGSIZE)
#define alpha_op_literal( lit ) \
((lit & AXP_OFF7_MASK) << AXP_LIT_SHIFT)
#define alpha_mem_br_func( func, hint ) \
(((func & AXP_OFF2_MASK ) << AXP_MEM_BR_SHIFT ) | (hint&AXP_OFF14_MASK))
#define alpha_mem_fc_func( func ) \
(func && AXP_OFF16_MASK)
#define alpha_encode_hw4_mem( op, func ) \
(alpha_opcode( op ) | (( func & 0x0f ) << 12))
#define alpha_encode_hw5_mem( op, func ) \
(alpha_opcode( op ) | (( func & 0x3f ) << 10))
#define alpha_encode_hw6mem( op, func ) \
(alpha_opcode( op ) | (( func & 0x0f ) << 12))
#define alpha_encode_hw6mem_br( op, func ) \
(alpha_opcode( op ) | (( func & 0x07 ) << 13))
/*****************************************/
#define alpha_encode_palcall( ins, op, func ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | ( func & AXP_OFF26_MASK ))
#define alpha_encode_mem( ins, op, Rdest, Rsrc, offset ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Rdest ) | \
alpha_reg2( Rsrc ) | (offset & AXP_OFF16_MASK ))
#define alpha_encode_mem_fc( ins, op, func, Rdest, Rsrc, offset ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Rdest ) | \
alpha_reg2( Rsrc ) | alpha_mem_fc_func( func ))
#define alpha_encode_mem_br( ins, op, func, Rdest, Rsrc, hint ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Rdest ) | \
alpha_reg2( Rsrc ) | alpha_mem_br_func( func, hint ) )
#define alpha_encode_branch( ins, op, Reg, offset ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Reg ) | \
(offset & AXP_OFF21_MASK ))
#define alpha_encode_op( ins, op, func, Rsrc1, Rsrc2, Rdest ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Rsrc1 ) | \
alpha_reg2( Rsrc2 ) | alpha_op_func( func ) | \
alpha_reg3( Rdest ))
#define alpha_encode_opl( ins, op, func, Rsrc, lit, Rdest ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Rsrc1 ) | \
alpha_op_literal(lit) | ( 1 << 12 ) | \
alpha_op_func( func ) | alpha_reg3( Rdest ) )
#define alpha_encode_fpop( ins, op, func, Rsrc1, Rsrc2, Rdest ) \
*((__alpha_int_32*)(ins))++ = ( 0 |\
alpha_opcode( op ) | alpha_reg1( Rsrc1 ) | \
alpha_reg2( Rsrc2 ) | alpha_fp_func( func ) | \
alpha_reg3( Rdest ))
#define alpha_reg_zero 31
/***************************************/
/* pal calls */
/* #define alpha_halt( ins ) alpha_encode_palcall( ins, 0, 0 ) */
#define alpha_call_pal( ins, func ) alpha_encode_palcall( ins, 0, x )
/*memory*/
#define alpha_lda( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x08, Rdest, Rsrc, offset )
#define alpha_ldah( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x09, Rdest, Rsrc, offset )
#define alpha_ldbu( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0a, Rdest, Rsrc, offset )
#define alpha_ldq_u( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0b, Rdest, Rsrc, offset )
#define alpha_ldwu( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0c, Rdest, Rsrc, offset )
#define alpha_stw( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0d, Rdest, Rsrc, offset )
#define alpha_stb( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0e, Rdest, Rsrc, offset )
#define alpha_stq_u( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0f, Rdest, Rsrc, offset )
#define alpha_ldf( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x20, Rdest, Rsrc, offset )
#define alpha_ldg( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x21, Rdest, Rsrc, offset )
#define alpha_lds( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x22, Rdest, Rsrc, offset )
#define alpha_ldt( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x23, Rdest, Rsrc, offset )
#define alpha_stf( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x24, Rdest, Rsrc, offset )
#define alpha_stg( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x25, Rdest, Rsrc, offset )
#define alpha_sts( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x26, Rdest, Rsrc, offset )
#define alpha_stt( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x27, Rdest, Rsrc, offset )
#define alpha_ldl( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x28, Rdest, Rsrc, offset )
#define alpha_ldq( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x29, Rdest, Rsrc, offset )
#define alpha_ldl_l( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2A, Rdest, Rsrc, offset )
#define alpha_ldq_l( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2B, Rdest, Rsrc, offset )
#define alpha_stl( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2C, Rdest, Rsrc, offset )
#define alpha_stq( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2D, Rdest, Rsrc, offset )
#define alpha_stl_c( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2E, Rdest, Rsrc, offset )
#define alpha_stq_c( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2F, Rdest, Rsrc, offset )
/* branch*/
#define alpha_jmp( ins, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x0, alpha_reg_zero, Rsrc, hint )
#define alpha_jsr( ins, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x1, alpha_reg_zero, Rsrc, hint )
#define alpha_ret( ins, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x2, alpha_reg_zero, Rsrc, hint )
#define alpha_jsrco( ins, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x3, alpha_reg_zero, Rsrc, hint )
#define alpha_br( ins, Reg, offset ) alpha_encode_branch( ins, 0x30, Reg, offset )
#define alpha_fbeq( ins, Reg, offset ) alpha_encode_branch( ins, 0x31, Reg, offset )
#define alpha_fblt( ins, Reg, offset ) alpha_encode_branch( ins, 0x32, Reg, offset )
#define alpha_fble( ins, Reg, offset ) alpha_encode_branch( ins, 0x33, Reg, offset )
#define alpha_bsr( ins, Reg, offset ) alpha_encode_branch( ins, 0x34, Reg, offset )
#define alpha_fbne( ins, Reg, offset ) alpha_encode_branch( ins, 0x35, Reg, offset )
#define alpha_fbge( ins, Reg, offset ) alpha_encode_branch( ins, 0x36, Reg, offset )
#define alpha_fbgt( ins, Reg, offset ) alpha_encode_branch( ins, 0x37, Reg, offset )
#define alpha_blbc( ins, Reg, offset ) alpha_encode_branch( ins, 0x38, Reg, offset )
#define alpha_beq( ins, Reg, offset ) alpha_encode_branch( ins, 0x39, Reg, offset )
#define alpha_blt( ins, Reg, offset ) alpha_encode_branch( ins, 0x3A, Reg, offset )
#define alpha_ble( ins, Reg, offset ) alpha_encode_branch( ins, 0x3B, Reg, offset )
#define alpha_blbs( ins, Reg, offset ) alpha_encode_branch( ins, 0x3C, Reg, offset )
#define alpha_bne( ins, Reg, offset ) alpha_encode_branch( ins, 0x3D, Reg, offset )
#define alpha_bge( ins, Reg, offset ) alpha_encode_branch( ins, 0x3E, Reg, offset )
#define alpha_bgt( ins, Reg, offset ) alpha_encode_branch( ins, 0x3F, Reg, offset )
/* integer */
/*//#define alpha_sextl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x00, Rsrc1, Rsrc2, Rdest )
//#define alpha_sextl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x00, Rsrc1, lit, Rdest )
*/
#define alpha_addl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x00, Rsrc1, Rsrc2, Rdest )
#define alpha_addl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x00, Rsrc1, lit, Rdest )
#define alpha_s4addl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x02, Rsrc1, Rsrc2, Rdest )
#define alpha_s4addl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x02, Rsrc1, lit, Rdest )
//#define alpha_negl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x09, Rsrc1, Rsrc2, Rdest )
//#define alpha_negl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x09, Rsrc1, lit, Rdest )
#define alpha_subl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x09, Rsrc1, Rsrc2, Rdest )
#define alpha_subl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x09, Rsrc1, lit, Rdest )
#define alpha_s4subl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x0B, Rsrc1, Rsrc2, Rdest )
#define alpha_s4subl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x0B, Rsrc1, lit, Rdest )
#define alpha_cmpbge( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x0F, Rsrc1, Rsrc2, Rdest )
#define alpha_cmpbge_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x0F, Rsrc1, lit, Rdest )
#define alpha_s8addl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x12, Rsrc1, Rsrc2, Rdest )
#define alpha_s8addl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x12, Rsrc1, lit, Rdest )
#define alpha_s8subl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x1B, Rsrc1, Rsrc2, Rdest )
#define alpha_s8subl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x1B, Rsrc1, lit, Rdest )
#define alpha_cmpult( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x1d, Rsrc1, Rsrc2, Rdest )
#define alpha_cmpult_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x1d, Rsrc1, lit, Rdest )
#define alpha_addq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x20, Rsrc1, Rsrc2, Rdest )
#define alpha_addq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x20, Rsrc1, lit, Rdest )
#define alpha_s4addq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x22, Rsrc1, Rsrc2, Rdest )
#define alpha_s4addq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x22, Rsrc1, lit, Rdest )
//#define alpha_negq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x29, Rsrc1, Rsrc2, Rdest )
//#define alpha_negq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x29, Rsrc1, lit, Rdest )
#define alpha_subq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x29, Rsrc1, Rsrc2, Rdest )
#define alpha_subq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x29, Rsrc1, lit, Rdest )
#define alpha_s4subq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x2B, Rsrc1, Rsrc2, Rdest )
#define alpha_s4subq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x2B, Rsrc1, lit, Rdest )
#define alpha_cmpeq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x2D, Rsrc1, Rsrc2, Rdest )
#define alpha_cmpeq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x2D, Rsrc1, lit, Rdest )
#define alpha_s8addq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x32, Rsrc1, Rsrc2, Rdest )
#define alpha_s8addq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x32, Rsrc1, lit, Rdest )
#define alpha_s8subq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x3B, Rsrc1, Rsrc2, Rdest )
#define alpha_s8subq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x3B, Rsrc1, lit, Rdest )
#define alpha_cmpule( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x3D, Rsrc1, Rsrc2, Rdest )
#define alpha_cmpule_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x3D, Rsrc1, lit, Rdest )
#define alpha_addlv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x40, Rsrc1, Rsrc2, Rdest )
#define alpha_addlv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x40, Rsrc1, lit, Rdest )
//#define alpha_neglv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x49, Rsrc1, Rsrc2, Rdest )
//#define alpha_neglv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x49, Rsrc1, lit, Rdest )
#define alpha_sublv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x49, Rsrc1, Rsrc2, Rdest )
#define alpha_sublv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x49, Rsrc1, lit, Rdest )
#define alpha_cmplt( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x4D, Rsrc1, Rsrc2, Rdest )
#define alpha_cmplt_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x4D, Rsrc1, lit, Rdest )
#define alpha_addqv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x60, Rsrc1, Rsrc2, Rdest )
#define alpha_addqv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x60, Rsrc1, lit, Rdest )
//#define alpha_negqv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x69, Rsrc1, Rsrc2, Rdest )
//#define alpha_negqv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x69, Rsrc1, lit, Rdest )
#define alpha_subqv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x69, Rsrc1, Rsrc2, Rdest )
#define alpha_subqv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x69, Rsrc1, lit, Rdest )
#define alpha_cmple( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x6D, Rsrc1, Rsrc2, Rdest )
#define alpha_cmple_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x10, 0x6D, Rsrc1, lit, Rdest )
#define alpha_and( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x00, Rsrc1, Rsrc2, Rdest )
#define alpha_and_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x00, Rsrc1, lit, Rdest )
//#define alpha_andnot( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x08, Rsrc1, Rsrc2, Rdest )
//#define alpha_andnot_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x08, Rsrc1, lit, Rdest )
#define alpha_bic( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x08, Rsrc1, Rsrc2, Rdest )
#define alpha_bic_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x08, Rsrc1, lit, Rdest )
#define alpha_cmovlbs( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x14, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovlbs_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x14, Rsrc1, lit, Rdest )
#define alpha_cmovlbc( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x16, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovlbc_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x16, Rsrc1, lit, Rdest )
#define alpha_nop( ins ) alpha_encode_op( ins, 0x11, 0x20, alpha_reg_zero, alpha_reg_zero, alpha_reg_zero )
#define alpha_clr( ins, Rdest ) alpha_encode_op( ins, 0x11, 0x20, alpha_reg_zero, alpha_reg_zero, Rdest )
#define alpha_mov1( ins, Rsrc, Rdest ) alpha_encode_op( ins, 0x11, 0x20, alpha_reg_zero, Rsrc, Rdest )
#define alpha_mov2( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x20, Rsrc1, Rsrc2, Rdest )
#define alpha_mov_( ins, lit, Rdest ) alpha_encode_op( ins, 0x11, 0x20, alpha_reg_zero, lit, Rdest )
//#define alpha_or( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x20, Rsrc1, Rsrc2, Rdest )
//#define alpha_or_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x20, Rsrc1, lit, Rdest )
#define alpha_bis( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x20, Rsrc1, Rsrc2, Rdest )
#define alpha_bis_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x20, Rsrc1, lit, Rdest )
#define alpha_cmoveq( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x24, Rsrc1, Rsrc2, Rdest )
#define alpha_cmoveq_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x24, Rsrc1, lit, Rdest )
#define alpha_cmovne( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x26, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovne_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x26, Rsrc1, lit, Rdest )
#define alpha_not( ins, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x28, alpha_reg_zero, Rsrc2, Rdest )
#define alpha_not_( ins, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x28, alpha_reg_zero, lit, Rdest )
#define alpha_ornot( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x28, Rsrc1, Rsrc2, Rdest )
#define alpha_ornot_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x28, Rsrc1, lit, Rdest )
#define alpha_xor( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x40, Rsrc1, Rsrc2, Rdest )
#define alpha_xor_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x40, Rsrc1, lit, Rdest )
#define alpha_cmovlt( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x44, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovlt_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x44, Rsrc1, lit, Rdest )
#define alpha_cmovge( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x46, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovge_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x46, Rsrc1, lit, Rdest )
#define alpha_eqv( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x48, Rsrc1, Rsrc2, Rdest )
#define alpha_eqv_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x48, Rsrc1, lit, Rdest )
//#define alpha_xornot( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x48, Rsrc1, Rsrc2, Rdest )
//#define alpha_xornot_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x48, Rsrc1, lit, Rdest )
#define alpha_ev56b_amask( ins, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x61, alpha_reg_zero, Rsrc2, Rdest )
#define alpha_ev56b_amask_( ins, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x61, alpha_reg_zero, lit, Rdest )
#define alpha_cmovle( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x64, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovle_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x64, Rsrc1, lit, Rdest )
#define alpha_cmovgt( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x66, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovgt_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x66, Rsrc1, lit, Rdest )
//#define alpha_implver_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x6C, Rsrc1, lit, Rdest )
#define alpha_cmovgt( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x66, Rsrc1, Rsrc2, Rdest )
#define alpha_cmovgt_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x11, 0x66, Rsrc1, lit, Rdest )
#define alpha_mskbl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x02, Rsrc1, Rsrc2, Rdest )
#define alpha_mskbl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x02, Rsrc1, lit, Rdest )
#define alpha_extbl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x06, Rsrc1, Rsrc2, Rdest )
#define alpha_extbl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x06, Rsrc1, lit, Rdest )
#define alpha_insbl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x0B, Rsrc1, Rsrc2, Rdest )
#define alpha_insbl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x0B, Rsrc1, lit, Rdest )
#define alpha_mskwl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x12, Rsrc1, Rsrc2, Rdest )
#define alpha_mskwl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x12, Rsrc1, lit, Rdest )
#define alpha_extwl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x16, Rsrc1, Rsrc2, Rdest )
#define alpha_extwl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x16, Rsrc1, lit, Rdest )
#define alpha_inswl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x1b, Rsrc1, Rsrc2, Rdest )
#define alpha_inswl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x1b, Rsrc1, lit, Rdest )
#define alpha_mskll( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x22, Rsrc1, Rsrc2, Rdest )
#define alpha_mskll_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x22, Rsrc1, lit, Rdest )
#define alpha_extll( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x26, Rsrc1, Rsrc2, Rdest )
#define alpha_extll_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x26, Rsrc1, lit, Rdest )
#define alpha_insll( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x2b, Rsrc1, Rsrc2, Rdest )
#define alpha_insll_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x2b, Rsrc1, lit, Rdest )
#define alpha_zap( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x30, Rsrc1, Rsrc2, Rdest )
#define alpha_zap_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x30, Rsrc1, lit, Rdest )
#define alpha_zapnot( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x31, Rsrc1, Rsrc2, Rdest )
#define alpha_zapnot_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x31, Rsrc1, lit, Rdest )
#define alpha_mskql( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x32, Rsrc1, Rsrc2, Rdest )
#define alpha_mskql_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x32, Rsrc1, lit, Rdest )
#define alpha_srl( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x34, Rsrc1, Rsrc2, Rdest )
#define alpha_srl_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x34, Rsrc1, lit, Rdest )
#define alpha_extql( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x36, Rsrc1, Rsrc2, Rdest )
#define alpha_extql_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x36, Rsrc1, lit, Rdest )
#define alpha_sll( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x39, Rsrc1, Rsrc2, Rdest )
#define alpha_sll_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x39, Rsrc1, lit, Rdest )
#define alpha_insql( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x3b, Rsrc1, Rsrc2, Rdest )
#define alpha_insql_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x3b, Rsrc1, lit, Rdest )
#define alpha_sra( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x3c, Rsrc1, Rsrc2, Rdest )
#define alpha_sra_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x3c, Rsrc1, lit, Rdest )
#define alpha_mskwh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x52, Rsrc1, Rsrc2, Rdest )
#define alpha_mskwh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x52, Rsrc1, lit, Rdest )
#define alpha_inswh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x57, Rsrc1, Rsrc2, Rdest )
#define alpha_inswh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x57, Rsrc1, lit, Rdest )
#define alpha_extwh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x5a, Rsrc1, Rsrc2, Rdest )
#define alpha_extwh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x5a, Rsrc1, lit, Rdest )
#define alpha_msklh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x62, Rsrc1, Rsrc2, Rdest )
#define alpha_msklh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x62, Rsrc1, lit, Rdest )
#define alpha_inslh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x67, Rsrc1, Rsrc2, Rdest )
#define alpha_inslh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x67, Rsrc1, lit, Rdest )
#define alpha_extlh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x6a, Rsrc1, Rsrc2, Rdest )
#define alpha_extlh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x6a, Rsrc1, lit, Rdest )
#define alpha_mskqh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x72, Rsrc1, Rsrc2, Rdest )
#define alpha_mskqh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x72, Rsrc1, lit, Rdest )
#define alpha_insqh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x77, Rsrc1, Rsrc2, Rdest )
#define alpha_insqh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x77, Rsrc1, lit, Rdest )
#define alpha_extqh( ins, Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x12, 0x7a, Rsrc1, Rsrc2, Rdest )
#define alpha_extqh_( ins, Rsrc1, lit, Rdest ) alpha_encode_opl( ins, 0x12, 0x7a, Rsrc1, lit, Rdest )
#endif
------=_20030127000140_77131
Content-Type: text/plain; name="test.c"
Content-Disposition: attachment; filename="test.c"
#include "alpha-codegen.h"
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stdio.h>
//
// Simple function which returns 10.
//
char * write_testfunc_1( char * p )
{
//00000001200004d0 <testfunc>:
// 1200004d0: f0 ff de 23 lda sp,-16(sp)
// 1200004d4: 00 00 5e b7 stq ra,0(sp)
// 1200004d8: 08 00 fe b5 stq fp,8(sp)
// 1200004dc: 0f 04 fe 47 mov sp,fp
// 1200004e0: 0a 00 3f 20 lda t0,10
// 1200004e4: 00 04 e1 47 mov t0,v0
// 1200004e8: 1e 04 ef 47 mov fp,sp
// 1200004ec: 00 00 5e a7 ldq ra,0(sp)
// 1200004f0: 08 00 fe a5 ldq fp,8(sp)
// 1200004f4: 10 00 de 23 lda sp,16(sp)
// 1200004f8: 01 80 fa 6b ret
// 1200004d0: f0 ff de 23 lda sp,-16(sp)
*p++ = 0xf0; *p++ = 0xff;*p++ = 0xde;*p++ = 0x23;
// 1200004d4: 00 00 5e b7 stq ra,0(sp)
*p++ = 0x00; *p++ = 0x00;*p++ = 0x5e;*p++ = 0xb7;
// 1200004d8: 08 00 fe b5 stq fp,8(sp)
*p++ = 0x08; *p++ = 0x00;*p++ = 0xfe;*p++ = 0xb5;
// 1200004dc: 0f 04 fe 47 mov sp,fp
*p++ = 0x0f; *p++ = 0x04;*p++ = 0xfe;*p++ = 0x47;
// 1200004e0: 0a 00 3f 20 lda t0,10
*p++ = 0x0a; *p++ = 0x00;*p++ = 0x3f;*p++ = 0x20;
// 1200004e4: 00 04 e1 47 mov t0,v0
*p++ = 0x00; *p++ = 0x04;*p++ = 0xe1;*p++ = 0x47;
// 1200004e8: 1e 04 ef 47 mov fp,sp
*p++ = 0x1e; *p++ = 0x04;*p++ = 0xef;*p++ = 0x47;
// 1200004ec: 00 00 5e a7 ldq ra,0(sp)
*p++ = 0x00; *p++ = 0x00;*p++ = 0x5e;*p++ = 0xa7;
// 1200004f0: 08 00 fe a5 ldq fp,8(sp)
*p++ = 0x08; *p++ = 0x00;*p++ = 0xfe;*p++ = 0xa5;
// 1200004f4: 10 00 de 23 lda sp,16(sp)
*p++ = 0x10; *p++ = 0x00;*p++ = 0xde;*p++ = 0x23;
// 1200004f8: 01 80 fa 6b ret
*p++ = 0x01; *p++ = 0x80;*p++ = 0xfa;*p++ = 0x6b;
return p;
}
#define t0 1
#define t1 2
#define a0 16
#define sp 30
#define gp 29
#define t12 27
#define ra 26
#define v0 0
// The same function encoded with alpha-codegen.h
// Still needs work on the fp insns.
//
char * write_testfunc_2( char * p )
{
alpha_lda( p, sp, sp, -16 );
alpha_stq( p, ra, sp, 0 );
// alpha_stq( p, fp, sp, 8 );
// alpha_mov1( p, sp, fp );
alpha_lda( p, t0, alpha_reg_zero, 10 );
alpha_mov1( p, t0, v0 );
// alpha_mov1( p, sp, fp );
alpha_ldq( p, ra, sp, 0 );
// alpha_ldq( p, fp, sp, 8 );
alpha_lda( p, sp, sp, 16 );
alpha_ret( p, ra, 1 );
return p;
}
void output( char * p, int len )
{
int fd = open( "bad.out", O_CREAT | O_TRUNC );
write( fd, p, len );
close( fd );
}
int main( int argc, char ** argv ) {
char code [16000];
char *p = code;
char * cp;
printf( "%d", sizeof( unsigned int ) );
printf (".text\n.align 4\n.globl main\n.type main,@function\nmain:\n");
// so, `test blah` gets you the byte-encoded function.
// and `test` gets you the alpha-codegen.h encoded function.
if( argc > 1 )
{
p = write_testfunc_1( p );
}
else
{
p = write_testfunc_2( p );
}
for (cp = code; cp < p; cp++)
{
printf (".byte 0x%0.2x\n", (*cp&0x00ff) );
}
output( code, p-code );
return 0;
}
------=_20030127000140_77131--