[Mono-dev] Mono Port to Tilera Tile-GX
Braddock Gaskill (Contractor)
braddock.gaskill at apx-labs.com
Sat Jul 14 22:10:27 UTC 2012
The Tilera TILE-Gx is not really based on MIPS (I have seen that stated elsewhere). It is a fairly exotic 64-bit VLIW architecture which has its origins from MIT research in the '90s. We are doing the port more or less from scratch.
The TILE-Gx instruction set architecture is documented here if you are interested:
From: Rodrigo Kumpera [kumpera at gmail.com]
Sent: Saturday, July 14, 2012 10:51 AM
To: Braddock Gaskill (Contractor)
Cc: mono-devel-list at lists.ximian.com
Subject: Re: [Mono-dev] Mono Port to Tilera Tile-GX
Those are great news!
Yes you can handle that by specifying in the machine that the float operations to use integer registers.
By the way, Tilera's a MIPS based CPU right? So, please avoid breaking regular MIPS with your
changes to make it easier to merge your patches.
On Sat, Jul 14, 2012 at 2:06 PM, Braddock Gaskill (Contractor) <braddock.gaskill at apx-labs.com<mailto:braddock.gaskill at apx-labs.com>> wrote:
Hello Mono Community,
We are working on a port of Mono to Tilera's Tile-GX 100-core CPU.
I have a question about the register allocator. The Tile-GX does not have separate floating point registers - floating point operations use the 55 64-bit general-purpose registers. As far as I can tell all other Mono architectures have separate floating point registers.
Is the register allocator able to accommodate using general-purpose registers for floating point operations? Do I simply specify src1:i instead of src1:f in the machine description file?
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