[Mono-devel-list] mini-sparc.c patch

Taylor Christopher P ct at cs.clemson.edu
Wed Jul 30 00:17:14 EDT 2003


i did a diff -u on mini-ppc.c against my mini-sparc.c file

it's still a rough bit of work, but it's a start

Christopher Paul Taylor, Clemson University Computer Science Dept.
-------------- next part --------------
--- mini-ppc.c	Tue Jul 29 14:31:59 2003
+++ mini-sparc.c	Wed Jul 30 00:07:10 2003
@@ -5,6 +5,9 @@
  *   Paolo Molaro (lupus at ximian.com)
  *   Dietmar Maurer (dietmar at ximian.com)
  *
+ * Modified for SPARC:
+ *   Christopher Taylor (ct at gentoo.org)
+ *
  * (C) 2003 Ximian, Inc.
  */
 #include "mini.h"
@@ -22,13 +25,13 @@
 const char*
 mono_arch_regname (int reg) {
 	static const char * rnames[] = {
-		"ppc_r0", "ppc_sp", "ppc_r2", "ppc_r3", "ppc_r4",
-		"ppc_r5", "ppc_r6", "ppc_r7", "ppc_r8", "ppc_r9",
-		"ppc_r10", "ppc_r11", "ppc_r12", "ppc_r13", "ppc_r14",
-		"ppc_r15", "ppc_r16", "ppc_r17", "ppc_r18", "ppc_r19",
-		"ppc_r20", "ppc_r21", "ppc_r22", "ppc_r23", "ppc_r24",
-		"ppc_r25", "ppc_r26", "ppc_r27", "ppc_r28", "ppc_r29",
-		"ppc_r30", "ppc_r31"
+		"sparc_r0", "sparc_sp", "sparc_r2", "sparc_r3", "sparc_r4",
+		"sparc_r5", "sparc_r6", "sparc_r7", "sparc_r8", "sparc_r9",
+		"sparc_r10", "sparc_r11", "sparc_r12", "sparc_r13", "sparc_r14",
+		"sparc_r15", "sparc_r16", "sparc_r17", "sparc_r18", "sparc_r19",
+		"sparc_r20", "sparc_r21", "sparc_r22", "sparc_r23", "sparc_r24",
+		"sparc_r25", "sparc_r26", "sparc_r27", "sparc_r28", "sparc_r29",
+		"sparc_r30", "sparc_r31"
 	};
 	if (reg >= 0 && reg < 32)
 		return rnames [reg];
@@ -1916,33 +1919,33 @@
 
 		switch (ins->opcode) {
 		case OP_STOREI1_MEMBASE_IMM:
-			ppc_li (code, ppc_r11, ins->inst_imm);
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_stb (code, ppc_r11, ins->inst_offset, ins->inst_destbasereg);
+			sparc_ld_imm (code, sparc_l0, (ins->inst_offset), ins->inst_imm);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_stb (code, sparc_l0, (ins->inst_offset), ins->inst_destbasereg);
 			break;
 		case OP_STOREI2_MEMBASE_IMM:
-			ppc_li (code, ppc_r11, ins->inst_imm);
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_sth (code, ppc_r11, ins->inst_offset, ins->inst_destbasereg);
+			sparc_ld_imm (code, sparc_l0, (ins->inst_offset), ins->inst_imm);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_sth (code, sparc_l0, ins->inst_offset, ins->inst_destbasereg);
 			break;
 		case OP_STORE_MEMBASE_IMM:
 		case OP_STOREI4_MEMBASE_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_stw (code, ppc_r11, ins->inst_offset, ins->inst_destbasereg);
+			sparc_ld (code, sparc_l0, ins->inst_imm);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_st (code, sparc_l0, ins->inst_offset, ins->inst_destbasereg);
 			break;
 		case OP_STOREI1_MEMBASE_REG:
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_stb (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_stb (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
 			break;
 		case OP_STOREI2_MEMBASE_REG:
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_sth (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_sth (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
 			break;
 		case OP_STORE_MEMBASE_REG:
 		case OP_STOREI4_MEMBASE_REG:
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_stw (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_st (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
 			break;
 		case CEE_LDIND_I:
 		case CEE_LDIND_I4:
@@ -1959,172 +1962,173 @@
 		case OP_LOADI4_MEMBASE:
 		case OP_LOADU4_MEMBASE:
 			if (ppc_is_imm16 (ins->inst_offset)) {
-				ppc_lwz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
+				sparc_ld (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
 			} else {
-				ppc_load (code, ppc_r11, ins->inst_offset);
-				ppc_lwz (code, ins->dreg, 0, ppc_r11);
+				sparc_ld (code, ppc_r11, ins->inst_offset);
+				sparc_ld (code, ins->dreg, 0, ppc_r11);
 			}
 			break;
 		case OP_LOADU1_MEMBASE:
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_lbz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
+//			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_ldub (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
 			break;
 		case OP_LOADI1_MEMBASE:
-			g_assert (ppc_is_imm16 (ins->inst_offset));
+		  //			g_assert (ppc_is_imm16 (ins->inst_offset));
 			// FIXME: sign extend
-			ppc_lbz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
+			sparc_ldub (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
 			break;
 		case OP_LOADU2_MEMBASE:
-			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_lhz (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
+		  //			g_assert (ppc_is_imm16 (ins->inst_offset));
+			sparc_lduh (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
 			break;
 		case OP_LOADI2_MEMBASE:
 			g_assert (ppc_is_imm16 (ins->inst_offset));
-			ppc_lha (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
+			sparc_lduh (code, ins->dreg, ins->inst_basereg, ins->inst_offset);
 			break;
 		case CEE_CONV_I1:
-			ppc_extsb (code, ins->dreg, ins->sreg1);
+			sparc_sethi (code, ins->dreg, ins->sreg1);
 			break;
 		case CEE_CONV_I2:
-			ppc_extsh (code, ins->dreg, ins->sreg1);
+			sparc_set (code, ins->dreg, ins->sreg1);
 			break;
 		case CEE_CONV_U1:
-			ppc_rlwinm (code, ins->dreg, ins->sreg1, 0, 24, 31);
+		  //ppc_rlwinm (code, ins->dreg, ins->sreg1, 0, 24, 31);
 			break;
 		case CEE_CONV_U2:
-			ppc_rlwinm (code, ins->dreg, ins->sreg1, 0, 16, 31);
+		  //ppc_rlwinm (code, ins->dreg, ins->sreg1, 0, 16, 31);
 			break;
 		case OP_COMPARE:
-			ppc_cmp (code, 0, 0, ins->sreg1, ins->sreg2);
+			sparc_cmp (code, 0, 0, ins->sreg1, ins->sreg2);
 			break;
 		case OP_COMPARE_IMM:
 			if (ppc_is_imm16 (ins->inst_imm)) {
-				ppc_cmpi (code, 0, 0, ins->sreg1, (ins->inst_imm & 0xffff));
+				sparc_cmp_imm (code, 0, 0, ins->sreg1, (ins->inst_imm & 0xffff));
 			} else {
-				ppc_load (code, ppc_r11, ins->inst_imm);
-				ppc_cmp (code, 0, 0, ins->sreg1, ppc_r11);
+				sparc_ld (code, ppc_r11, ins->inst_imm);
+				sparc_cmp (code, 0, 0, ins->sreg1, ppc_r11);
 			}
 			break;
 		case OP_X86_TEST_NULL:
-			ppc_cmpi (code, 0, 0, ins->sreg1, 0);
+			sparc_cmp_imm (code, 0, 0, ins->sreg1, 0);
 			break;
 		case CEE_BREAK:
-			ppc_break (code);
+		  //			ppc_break (code);
 			break;
 		case OP_ADDCC:
-			ppc_addc (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_add (code, ins->dreg, ins->sreg1, ins->sreg2);
+			//need to complement
 			break;
 		case CEE_ADD:
-			ppc_add (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_add (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case OP_ADC:
-			ppc_adde (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_addx (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case OP_ADD_IMM:
 			if (ppc_is_imm16 (ins->inst_imm)) {
-				ppc_addi (code, ins->dreg, ins->sreg1, ins->inst_imm);
+				sparc_add_imm (code, ins->dreg, ins->sreg1, ins->inst_imm);
 			} else {
-				ppc_load (code, ppc_r11, ins->inst_imm);
-				ppc_add (code, ins->dreg, ins->sreg1, ppc_r11);
+				sparc_ld (code, ppc_r11, ins->inst_imm);
+				sparc_add (code, ins->dreg, ins->sreg1, ppc_r11);
 			}
 			break;
 		case OP_ADC_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
-			ppc_adde (code, ins->dreg, ins->sreg1, ppc_r11);
+			sparc_ld (code, ppc_r11, ins->inst_imm);
+			sparc_addx (code, ins->dreg, ins->sreg1, ppc_r11);
 			break;
 		case OP_SUBCC:
-			ppc_subfc (code, ins->dreg, ins->sreg2, ins->sreg1);
+			sparc_sub (code, ins->dreg, ins->sreg2, ins->sreg1);
 			break;
 		case CEE_SUB:
-			ppc_subf (code, ins->dreg, ins->sreg2, ins->sreg1);
+			sparc_sub (code, ins->dreg, ins->sreg2, ins->sreg1);
 			break;
 		case OP_SBB:
-			ppc_subfe (code, ins->dreg, ins->sreg2, ins->sreg1);
+			sparc_subx (code, ins->dreg, ins->sreg2, ins->sreg1);
 			break;
 		case OP_SUB_IMM:
 			// we add the negated value
-			g_assert (ppc_is_imm16 (-ins->inst_imm));
-			ppc_addi (code, ins->dreg, ins->sreg1, -ins->inst_imm);
+		  //			g_assert (ppc_is_imm16 (-ins->inst_imm));
+			sparc_add_imm (code, ins->dreg, ins->sreg1, -ins->inst_imm);
 			break;
 		case OP_SBB_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
-			ppc_subfe (code, ins->dreg, ins->sreg2, ppc_r11);
+			sparc_ld (code, ppc_r11, ins->inst_imm);
+			sparc_sub (code, ins->dreg, ins->sreg2, ppc_r11);
 			break;
 		case OP_PPC_SUBFIC:
-			g_assert (ppc_is_imm16 (ins->inst_imm));
-			ppc_subfic (code, ins->dreg, ins->sreg1, ins->inst_imm);
+		  //			g_assert (ppc_is_imm16 (ins->inst_imm));
+			sparc_sub (code, ins->dreg, ins->sreg1, ins->inst_imm);
 			break;
 		case OP_PPC_SUBFZE:
-			ppc_subfze (code, ins->dreg, ins->sreg1);
+			sparc_sub (code, ins->dreg, ins->sreg1);
 			break;
 		case CEE_AND:
 			/* FIXME: the ppc macros as inconsistent here: put dest as the first arg! */
-			ppc_and (code, ins->sreg1, ins->dreg, ins->sreg2);
+			sparc_and (code, ins->sreg1, ins->dreg, ins->sreg2);
 			break;
 		case OP_AND_IMM:
 			if (!(ins->inst_imm & 0xffff0000)) {
-				ppc_andid (code, ins->sreg1, ins->dreg, ins->inst_imm);
+				sparc_and_imm (code, ins->sreg1, ins->dreg, ins->inst_imm);
 			} else if (!(ins->inst_imm & 0xffff)) {
-				ppc_andisd (code, ins->sreg1, ins->dreg, ((guint32)ins->inst_imm >> 16));
+				sparc_and_imm (code, ins->sreg1, ins->dreg, ((guint32)ins->inst_imm >> 16));
 			} else {
-				ppc_load (code, ppc_r11, ins->inst_imm);
-				ppc_and (code, ins->sreg1, ins->dreg, ins->sreg2);
+				sparc_ld (code, ppc_r11, ins->inst_imm);
+				sparc_and (code, ins->sreg1, ins->dreg, ins->sreg2);
 			}
 			break;
 		case CEE_DIV:
-			ppc_divw (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_sdiv (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case CEE_DIV_UN:
-			ppc_divwu (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_udiv (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case OP_DIV_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
-			ppc_divw (code, ins->dreg, ins->sreg1, ppc_r11);
+			sparc_ld (code, ppc_r11, ins->inst_imm);
+			sparc_sdiv_imm (code, ins->dreg, ins->sreg1, ppc_r11);
 			break;
 		case CEE_REM:
-			ppc_divw (code, ppc_r11, ins->sreg1, ins->sreg2);
-			ppc_mullw (code, ppc_r11, ppc_r11, ins->sreg2);
-			ppc_subf (code, ins->dreg, ppc_r11, ins->sreg1);
+			sparc_sdiv (code, ppc_r11, ins->sreg1, ins->sreg2);
+			sparc_muls (code, ppc_r11, ppc_r11, ins->sreg2);
+			sparc_sub (code, ins->dreg, ppc_r11, ins->sreg1);
 			break;
 		case CEE_REM_UN:
-			ppc_divwu (code, ppc_r11, ins->sreg1, ins->sreg2);
-			ppc_mullw (code, ppc_r11, ppc_r11, ins->sreg2);
-			ppc_subf (code, ins->dreg, ppc_r11, ins->sreg1);
+			sparc_udiv (code, ppc_r11, ins->sreg1, ins->sreg2);
+			sparc_muls (code, ppc_r11, ppc_r11, ins->sreg2);
+			sparc_sub (code, ins->dreg, ppc_r11, ins->sreg1);
 			break;
 		case OP_REM_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
-			ppc_divw (code, ins->dreg, ins->sreg1, ppc_r11);
-			ppc_mullw (code, ins->dreg, ins->dreg, ppc_r11);
-			ppc_subf (code, ins->dreg, ins->dreg, ins->sreg1);
+			sparc_ld (code, ppc_r11, ins->inst_imm);
+			sparc_sdiv (code, ins->dreg, ins->sreg1, ppc_r11);
+			sparc_smul (code, ins->dreg, ins->dreg, ppc_r11);
+			sparc_sub (code, ins->dreg, ins->dreg, ins->sreg1);
 			break;
 		case CEE_OR:
-			ppc_or (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_or (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case OP_OR_IMM:
 			if (!(ins->inst_imm & 0xffff0000)) {
-				ppc_ori (code, ins->sreg1, ins->dreg, ins->inst_imm);
+				sparc_or (code, ins->sreg1, ins->dreg, ins->inst_imm);
 			} else if (!(ins->inst_imm & 0xffff)) {
-				ppc_oris (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
+				sparc_orn (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
 			} else {
-				ppc_load (code, ppc_r11, ins->inst_imm);
-				ppc_or (code, ins->sreg1, ins->dreg, ins->sreg2);
+				sparc_ld (code, ppc_r11, ins->inst_imm);
+				sparc_or (code, ins->sreg1, ins->dreg, ins->sreg2);
 			}
 			break;
 		case CEE_XOR:
-			ppc_xor (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_xor (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case OP_XOR_IMM:
 			if (!(ins->inst_imm & 0xffff0000)) {
-				ppc_xori (code, ins->sreg1, ins->dreg, ins->inst_imm);
+				sparc_xor_imm (code, ins->sreg1, ins->dreg, ins->inst_imm);
 			} else if (!(ins->inst_imm & 0xffff)) {
-				ppc_xoris (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
+				ppc_xor_imm (code, ins->sreg1, ins->dreg, ((guint32)(ins->inst_imm) >> 16));
 			} else {
-				ppc_load (code, ppc_r11, ins->inst_imm);
-				ppc_xor (code, ins->sreg1, ins->dreg, ins->sreg2);
+				sparc_ld (code, ppc_r11, ins->inst_imm);
+				sparc_xor (code, ins->sreg1, ins->dreg, ins->sreg2);
 			}
 			break;
 		case CEE_SHL:
-			ppc_slw (code, ins->sreg1, ins->dreg, ins->sreg2);
+			sparc_ld (code, ins->sreg1, ins->dreg, ins->sreg2);
 			break;
 		case OP_SHL_IMM:
 			ppc_rlwinm (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0xf), 0, (31 - (ins->inst_imm & 0xf)));
@@ -2141,7 +2145,7 @@
 			ppc_srawi (code, ins->dreg, ins->sreg1, (ins->inst_imm & 0x1f));
 			break;
 		case OP_SHR_UN_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
+		        sparc_ld (code, ppc_r11, ins->inst_imm);
 			ppc_srw (code, ins->dreg, ins->sreg1, ppc_r11);
 			//ppc_rlwinm (code, ins->dreg, ins->sreg1, (32 - (ins->inst_imm & 0xf)), (ins->inst_imm & 0xf), 31);
 			break;
@@ -2149,31 +2153,31 @@
 			ppc_srw (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case CEE_NOT:
-			ppc_not (code, ins->dreg, ins->sreg1);
+			sparc_not (code, ins->dreg, ins->sreg1);
 			break;
 		case CEE_NEG:
-			ppc_neg (code, ins->dreg, ins->sreg1);
+			sparc_neg (code, ins->dreg, ins->sreg1);
 			break;
 		case CEE_MUL:
-			ppc_mullw (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_mul (code, ins->dreg, ins->sreg1, ins->sreg2);
 			break;
 		case OP_MUL_IMM:
-			ppc_load (code, ppc_r11, ins->inst_imm);
-			ppc_mullw (code, ins->dreg, ins->sreg1, ppc_r11);
+			sparc_ld (code, ppc_r11, ins->inst_imm);
+			sparc_mul_imm (code, ins->dreg, ins->sreg1, ppc_r11);
 			break;
 		case CEE_MUL_OVF:
-			ppc_mullw (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_mul (code, ins->dreg, ins->sreg1, ins->sreg2);
 			//g_assert_not_reached ();
 			//x86_imul_reg_reg (code, ins->sreg1, ins->sreg2);
 			//EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O, FALSE, "OverflowException");
 			break;
 		case CEE_MUL_OVF_UN:
-			ppc_mullw (code, ins->dreg, ins->sreg1, ins->sreg2);
+			sparc_mul (code, ins->dreg, ins->sreg1, ins->sreg2);
 			//FIXME: g_assert_not_reached ();
 			break;
 		case OP_ICONST:
 		case OP_SETREGIMM:
-			ppc_load (code, ins->dreg, ins->inst_c0);
+			sparc_ld (code, ins->dreg, ins->inst_c0);
 			break;
 		/*case OP_CLASS:
 			mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_CLASS, (gpointer)ins->inst_c0);
@@ -2232,10 +2236,10 @@
 		case OP_LOCALLOC:
 			/* keep alignment */
 #define MONO_FRAME_ALIGNMENT 32
-			ppc_addi (code, ppc_r0, ins->sreg1, MONO_FRAME_ALIGNMENT-1);
+			sparc_add_imm (code, ppc_r0, ins->sreg1, MONO_FRAME_ALIGNMENT-1);
 			ppc_rlwinm (code, ppc_r0, ppc_r0, 0, 0, 27);
 			ppc_lwz (code, ppc_r11, 0, ppc_sp);
-			ppc_neg (code, ppc_r0, ppc_r0);
+			sparc_neg (code, ppc_r0, ppc_r0);
 			ppc_stwux (code, ppc_sp, ppc_r0, ppc_sp);
 			ppc_mr (code, ins->dreg, ppc_sp);
 			g_assert_not_reached ();


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