[Mono-bugs] [Bug 61641][Wis] Changed - [PATCH] Suboptimal register allocation with `if' statements

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Changed by bmaurer@users.sf.net.

http://bugzilla.ximian.com/show_bug.cgi?id=61641

--- shadow/61641	2004-07-19 16:24:31.000000000 -0400
+++ shadow/61641.tmp.581	2004-07-19 16:30:19.000000000 -0400
@@ -11,13 +11,13 @@
 AssignedTo: mono-bugs@ximian.com                            
 ReportedBy: bmaurer@users.sf.net               
 QAContact: mono-bugs@ximian.com
 TargetMilestone: ---
 URL: 
 Cc: 
-Summary: Suboptimal register allocation with `if' statements
+Summary: [PATCH] Suboptimal register allocation with `if' statements
 
 Consider this program:
 
 class T {
 	static void Main () {
 		T t = new T ();
@@ -630,6 +630,47 @@
 liveness.
 
 ------- Additional Comments From bmaurer@users.sf.net  2004-07-19 16:24 -------
 Created an attachment (id=8636)
 mini-liveness-use-il-order.patch
 
+
+------- Additional Comments From bmaurer@users.sf.net  2004-07-19 16:30 -------
+The attached patch uses the order of the BBs as they are laid out in
+IL rather than the DFN. For example, mcs will translate
+
+if (x)
+    doblah;
+else
+    dofoo;
+do bar
+
+into 
+
+ldloc.x      // BB1
+brtrue L1    // BB1
+doblah       // BB2
+br L2        // BB2
+L1: dofoo    // BB3
+L2: dobar    // BB4
+
+With the old code, liveness would have seens the blocks in the order:
+
+{ BB1, BB2, BB4, BB3 }
+
+my code orders the blocks in the order
+
+{ BB1, BB2, BB3, BB4 }
+
+I think that this order is more natural and will result in better
+allocation decissions.
+
+I did a few tests to see how the register allocation was affected by
+this change. For many pieces of code, both runtime and the number of
+variables assigned to registers remained mostly unchanged. Two
+noticable increases were:
+
+    - MCS was able to allocate 10% more variables to registers
+    - Zipmark got a 10% performance increase on -O=deadce,loop
+
+We should do more evaluation of the new ordering for liveness, but I
+think the initial results are promising.